Sensors & Actuators

"As the number of enhancements to various Hardware Description Languages (HDLs) has increased over the past year, so too has the complexity of determining which language is best for a particular design. Many designers and organizations are contemplating whether they should switch from one HDL to another. This paper compares the technical characteristics of three, general-purpose HDLs.

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A powerful signal integrity analysis tool must be flexibility, easy to use and integrated into an existing EDA framework and design flow. In addition, it is important for the tool to be accurate enough. This report reviews a validation study for the Mentor Graphics HyperLynx 8.0 PI tool to establish confidence in using it for power integrity analysis.

For advanced signaling over high-loss channels, designs today are using equalization and several new measurement methods to evaluate the performance of the link. Both simulation and measurement tools support equalization and the new measurement methods, but correlation of results throughout the design flow is unclear. In this paper a high performance equalizing serial data link is measured and the performance is compared to that predicted by simulation. Then, the differences between simulation and measurements are discussed as well as methods to correlate the two.

High Density Interconnect (HDI) is being used more often to meet the growing need for more complex designs in smaller form factors. Beyond some of the more obvious electrical effects of using smaller vias, there is also an impact to the power integrity of a board using HDI. This includes different effects of mounted inductances of decoupling capacitors, changes in plane performance due to reduction in perforation from chip pinouts, and the inherent plane-capacitance changes from using dielectrics of various thicknesses. This paper will examine and quantify these effects, using numerous design examples, including a large conventional through-hole design board that was reduced using HDI.

The success of any consumer electronic device depends to a large extent on the appeal of the user interface (UI) and how easy the device is to use. Studies show that good cosmetic design can encourage users to explore the full range of features and often engenders the perception that a product is easier to use. So if the benefits of a great looking, easy-to-use UI are so clear, why are so many products still falling short of customer expectations? The solution lies in taking a fresh new approach a consumer electronic device UI plays. By identifying common UI functionality and implementing it in a reusable and customizable way, we can make it far easier for embedded engineers to deliver visually engaging and easy-to-use consumer electronic products.

Moving to C++ presents opportunities for higher programmer productivity. The requirements of embedded systems, however, demand that the adoption of C++ be carefully measured for the performance impact of run-time costs present in C++, but not in C. This talk suggests strategies for developers who are starting their acquaintance with C++.

While most coating systems address "piece parts", our linear system maximizes polymer yields, maintains consistent quality, increasing output, thereby driving down piece part costs.

Learn how to balance the positive and negative effects of memory utilization in virtual infrastructures to better handle system workload and priority--while improving server utilization

Offshoring Is a Cost Effective Solution to Your IT Needs

Paper provides background on Intel Atom processor for embedded market, the next-generation Atom Pineview CPUs, and platform-level solutions.

New technologies emerge every day, but not all of them pay off, and adopting them too early might be risky for your organization.

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Electronics and Software Engineering are quickly merging with traditional Mechanical Engineering to create a new paradigm in auto manufacturing: Mechatronics. Industry experts predict that this shift will bring about profound advances in automotive product development. Unfortunately, existing IT and process infrastructures do not provide sufficient capabilities to support the new paradigm: multiple data silos, a lack of standardized processes, and integration issues on a tool level (Mechanical, Electronic, Software) continue to pose serious obstacles to development efficiency, and remain a frequent source of delays, quality issues and cost increases.